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IC设计教程

最后发表: 2008-11-20 23:49 by wangmuhai

主题:428, 帖数: 9988

synthesis教程

最后发表: 2008-11-20 14:37 by fineamy

主题:447, 帖数: 4643

静态时序分析

最后发表: 2008-11-19 23:16 by li198501

主题:481, 帖数: 4298

DFT

最后发表: 2008-11-20 23:09 by zhuyu_wj

主题:635, 帖数: 3865

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芯片综合

    标题 作者 回复/查看 最后发表
  有谁知道E1和以太网怎么一起映射传输? seekdino 2005-1-2 1 / 70 2005-4-26 04:22 by hxjacky
  芯片内部ROM的综合位置的问题! helloteddy 2005-4-22 3 / 54 2005-4-26 04:17 by helloteddy
  到底做IC设计好,还是做FPGA,DSP好啊? dignity 2005-3-23 13 / 114 2005-4-25 22:16 by pythonlong
  求助[急]:rom初始化~~~  lpd 2005-4-25 0 / 66 2005-4-25 19:50 by lpd
  synplify pro综合后,产生的一个note twinstars 2005-4-25 0 / 41 2005-4-25 19:49 by twinstars
  关于系统时钟问题 jww126 2005-4-23 1 / 29 2005-4-24 20:29 by liuth
  关于synplify pro的关键路径问题? twinstars 2005-4-24 0 / 71 2005-4-24 19:05 by twinstars
  Intro_to_IC_tech (无内容) luckyshi 2005-4-23 2 / 33 2005-4-24 08:04 by painters
  什么样的电路能减轻异步时序的影响? goose906 2005-4-23 1 / 54 2005-4-23 22:14 by Frozenlips
  芯片连接 maddd 2005-4-23 0 / 47 2005-4-23 16:22 by maddd
  急:时钟信号很特别,能否飞线 smileday1 2005-4-21 1 / 33 2005-4-23 15:09 by susulee
  求延时芯片 maddd 2005-4-22 0 / 32 2005-4-23 06:22 by maddd
  求助 qhhlll 2005-4-22 0 / 46 2005-4-23 05:51 by qhhlll
  请问winxp下如何安装dc? synthesis 2005-3-7 9 / 111 2005-4-22 23:29 by laiyinhate
  NC Verilog (无内容) phannie 2005-4-21 0 / 54 2005-4-22 02:43 by phannie
  有人知道或者有seamless的资料吗? zw2002 2005-4-18 2 / 89 2005-4-20 19:22 by ninalee
  大家讨论一下高速电路中的常用电路结构吧 ninalee 2005-4-15 6 / 97 2005-4-20 18:44 by ninalee
  有请Power supply modular电路设计高手 posix6973 2005-4-19 0 / 49 2005-4-20 07:44 by posix6973
  全数字锁相环的设计 关键词:全数字锁相环;DPLL;FSK;FPGA frogman 2005-4-19 0 / 257 2005-4-19 19:58 by frogman
  数字集成电路(设计透视) (第二章,第六章 PPT 版) edatraining 2005-3-31 17 / 197 2005-4-18 20:58 by swallow520
  [公告]提供毕业设计服务,课程设计、光盘刻录 edawj 2005-4-16 0 / 83 2005-4-16 21:11 by edawj
  DC的class.lib中的process 后面得值这个是什么参数啊?~!谢谢 seraphll 2005-4-15 0 / 66 2005-4-16 06:32 by seraphll
  CADNECE5.0 安装是不是必须驱动网卡啊!??火急 seraphll 2005-4-14 2 / 70 2005-4-16 00:19 by liber
  请问NT下的DC怎么应用? kaixin0007 2005-4-14 2 / 48 2005-4-15 02:38 by f0rmat
  NT版dc求助!!!! 月下苍狼 2005-2-12 11 / 114 2005-4-14 20:33 by seraphll
  Dose Synopsys DC include Prime-Time function? smalldog 2005-4-13 4 / 165 2005-4-14 19:28 by smalldog
  [求助]OrCAD问题 nihao2005 2005-4-14 0 / 77 2005-4-14 17:24 by nihao2005
  设计约束及综合的问题 chworm 2005-4-13 1 / 69 2005-4-13 18:51 by chworm
  我打算去华为作ASIC,大家觉得如何?欢迎拍砖 henrycp 2005-1-14 16 / 218 2005-4-12 19:44 by kaixin0007
  请教一下mcu设计问题 synthesis 2005-4-8 1 / 82 2005-4-11 08:59 by Neil
  [求助]新手询问,RF IC设计是指IC设计呢?还是用PCB搭RF系统? smalldog 2005-4-7 3 / 42 2005-4-10 08:41 by smalldog
  请问VHDL有没有续行语句啊?!! seraphll 2005-4-9 0 / 43 2005-4-10 03:09 by seraphll
  有谁用verilog HDL编过格雷码计数器,请给个源代码 gnagil11 2005-4-7 0 / 62 2005-4-8 01:00 by gnagil11
  求:synopsys common licen*e pnp 2005-4-7 0 / 56 2005-4-8 00:53 by pnp
  毕业设计真难! (无内容) nihao2005 2005-4-7 0 / 43 2005-4-7 22:09 by nihao2005
  除以3怎么做啊 forbear 2005-3-31 3 / 46 2005-4-7 18:20 by forbear
  求:用于spartan2的PCI IP核,谢谢 (无内容) ioe4wang 2005-4-6 0 / 49 2005-4-6 19:17 by ioe4wang
  求助微处理器接口IP核设计资料 (无内容) quejifa163 2005-4-5 0 / 34 2005-4-6 05:35 by quejifa163
  微电子的看过来 nihao2005 2005-3-31 10 / 68 2005-4-6 03:00 by nihao2005
  有高人否? nihao2005 2005-4-3 3 / 86 2005-4-6 02:53 by nihao2005
  怎样把HDB3的双极信号变为单极信号 (无内容) wgwchina 2005-4-5 0 / 63 2005-4-5 16:15 by wgwchina
  想请教一下LATCH和DFF有什么区别? stonenut 2005-4-3 4 / 345 2005-4-5 07:32 by wangqiantj
  求ISA总线接口电路的HDL/FPGA设计方面的资料啊 xinghui 2005-4-4 0 / 84 2005-4-4 21:12 by xinghui
  了解desingware的请进 jockey 2005-2-13 3 / 80 2005-4-4 18:05 by ahan
  请问哪里可以下载关于综合和算法的ebook??谢谢 (无内容) seraphll 2005-4-3 0 / 93 2005-4-3 23:02 by seraphll
  求关于圣诞灯控制电路的Verilog RTL级代码设计的思路 madonion 2005-4-1 0 / 85 2005-4-2 04:40 by madonion
  请问大虾门一个ic放大器问题 sunnystone 2005-3-31 0 / 71 2005-3-31 19:31 by sunnystone
  求助!! awindwind 2005-3-29 0 / 38 2005-3-29 17:38 by awindwind
  [求助] vhdl编程求助!! zjo0116 2005-3-27 0 / 30 2005-3-27 19:37 by zjo0116
  关于mos的建模 pope2ooo 2005-3-18 1 / 52 2005-3-26 18:08 by niecl
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