上海美资设计公司,有兴趣的加我msn . [email=jerry_zhengjie@hotmail,com]jerry_zhengjie@hotmail,com[/email]
Responsibilities:
- Independently handle key IC design tasks:
Block level Micro-architecture, RTL Design ,Verification, Synthesis and timing closure.
Top level integration, including clock/reset implementation, synthesis and timing closure.
FPGA validation and Silicon bring-up.
- Participating in company’s key engineering initiatives: Methodology improvement, new architecture study and proposal.
- Coordinating joint development with 3rd party:
IP selection/management and vendor coordination
Interface with 3rd party vendor for successful execution
Requirements:
Must have:
- BSEE Degree or equivalent
- Minimum 2 years of experience in hands-on IC design
- Familiarity with ASIC design methodology and SoC architecture.
- Familiarity with standard CAD tools including simulation, synthesis, formal verification tools.
- Self-motivated in solving problems
- Good communication skills and fluent in English.
- Good team player.
A plus to have:
- Good scripting skills.
- DDR design experience.
- Experience in DFT.



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hailintong (2008-8-25 11:11:45)
chlor (2008-8-25 22:09:04)
fanb1983 (2008-8-25 22:56:57)