学习的过程也是一个遗忘的过程,为了留下学习轨迹或者是为了以后能够回忆下学习的过程,我会时不时的来更新自己正在学习的内容。

Verilog PLI introduction

上一篇 / 下一篇  2008-08-23 14:15:47 / 个人分类:HDL & VERIFICATION

   Verilog PLI (Programming Language Interface) is a mechanism to invoke C or C++ functions from Verilog code.

    The function invoked in Verilog code is called a system call. An example of a built-in system call is $display, $stop, $random. PLI allows the user to create custom system calls, something that Verilog syntax does not allow us to do. Some of these are:- 

  1.  Power analysis.
  2. Code coverage tools.
  3. Modifying the Verilog simulation data structure - more accurate delays.
  4. Custom output displays.
  5. Co-simulation.
  6. Design debug utilities.
  7. Simulation analysis.
  8. C-model interface to accelerate simulation.
  9.  Testbench modeling.

    To achieve these applications of PLI, C code should have access to the internal data structure of Verilog simulator. To facilitate this Verilog PLI provides something called acc routines or simply access routines.

    There is a second set of routines, which are called tf routines, or simply task and function routines. The tf and acc are PLI 1.0 routines and are very vast and very old. The next set of routines, which was introduced with the latest release of Verilog 2001 is called vpi routines. These are small and crystal clear PLI routines and thus the new version PLI 2.0.

  You can get Verilog 2001 LRM or PLI 1.0 IEEE document for details of each and every function provided. Verilog IEEE LRMs are written in such a way that anyone with hardware background can understand. If you are unable to get hold of the above IEEE docs, then you can buy the PLI books listed in books section.


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