• Win...]]> blog zhongyunde Wed, 12 Dec 2007 16:16:18 GMT http://www.edacn.net/?uid-115914-action-viewspace-itemid-32358 --  16 字节的 RAM 设计
  --  VHDL 语言与FPGA 设计- 基于PROTEL dxp开发平台  p348
  library ieee;
  use IEEE.STD_LOGIC_1164.ALL;
  use IEEE.STD_LOGIC_ARITH.ALL;
  use IEEE.STD_LOGIC_UNSIGNED.ALL;
  entity ram16x8...]]> blog zhongyunde Tue, 11 Dec 2007 19:22:32 GMT http://www.edacn.net/?uid-115914-action-viewspace-itemid-32357 -- 块浮点的指数值判决
          function Jexp (Pexp,ai,aq,bi,bq,ci,cq,di,dq:std_logic_vector) return std_logic_vector is
      &...]]> blog zhongyunde Tue, 11 Dec 2007 16:19:05 GMT http://www.edacn.net/?uid-115914-action-viewspace-itemid-32352 USE ieee.std_logic_1164.all;
  
  
  LIBRARY ieee;
  USE ieee.std_logic_unsigned.all;
  
  ENTITY SHELL_DUOZTJI IS
   PORT (CLK,RESET: IN std_logic;
    dcounter0,dcounter1 : OUT std_logic);
   SIGNAL BP_dcounte...]]> blog zhongyunde Tue, 11 Dec 2007 00:51:19 GMT http://www.edacn.net/?uid-115914-action-viewspace-itemid-32320