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			    <title>lionking_2046的个人空间</title>
			    <link>http://www.edacn.net/?uid-44474</link>
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			    <copyright>Copyright(C) lionking_2046的个人空间</copyright>
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			    <lastBuildDate>Thu, 04 Dec 2008 09:05:40 GMT</lastBuildDate><item>
								<title>LVDS 简介</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-75485</link>
								<description><![CDATA[<P>(转自<A href="http://www.dzkf.cn/html/PCBjishu/2007/0416/1942.html">http://www.dzkf.cn/html/PCBjishu/2007/0416/1942.html</A>)</P>
<P><STRONG>1 LVDS信号介绍</STRONG><BR>LVDS：Low Voltage Differential Signaling，低电压差分信号。<BR>LVDS传输支持速率一...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Tue, 02 Dec 2008 10:25:23 GMT</pubDate>
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								<title>FPGA 等效门数的计算</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-75472</link>
								<description><![CDATA[<P>(转.发现网上转载都是一个版本,而且都是缺图的,拜托,以后转载别人的也专业一点,不能丢三落四,有点转载专业精神好吧.同时感慨为什么原创的这么少,全都是拷贝来拷贝去,(同时包括自己))</P>
<P>FPGA门数计算方法 <BR><BR>FPGA等效门数的计算方法有两种，一是把FPGA基本单...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Mon, 01 Dec 2008 10:14:50 GMT</pubDate>
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								<title>struct 与 union 的区别</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-75362</link>
								<description><![CDATA[&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; struct简单说就是一些相互关联的元素的集合，说是集合，但是它们在内存中的存放确是有先后顺序的，而不是杂乱无章，按什么顺序来放，就是按你申明的时候变量的顺序来存放，&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;下面，我...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Thu, 27 Nov 2008 15:25:35 GMT</pubDate>
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								<title>systemverilog 速查手册(二)</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-53060</link>
								<description><![CDATA[<H3 style="MARGIN: 13pt 0cm"><SPAN style="FONT-FAMILY: 宋体; mso-ascii-font-family: 'Courier New'; mso-hansi-font-family: 'Times New Roman'"><FONT size=5>标签</FONT></SPAN></H3>
<P class=MsoNormal style="MARGIN: 0cm 0cm 0pt; TEXT-INDENT: 21pt; mso-cha...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Mon, 27 Oct 2008 16:12:02 GMT</pubDate>
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								<title>systemverilog 速查手册(一)</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-53059</link>
								<description><![CDATA[<P>转,(某人对 systemveilog tutorial的中文翻译)</P>
<P class=MsoNormal style="MARGIN: 0cm 0cm 0pt; TEXT-ALIGN: center; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto; mso-pagination: widow-orphan; mso-outline-level: 1" align=center><B><SPAN lang...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Mon, 27 Oct 2008 14:35:53 GMT</pubDate>
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								<title>verilog task 与 function 区别</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-52603</link>
								<description><![CDATA[函数&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Mon, 13 Oct 2008 11:23:33 GMT</pubDate>
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								<title>sram dram sdram rom  flash 区别</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-52420</link>
								<description><![CDATA[<P>(转载整理)</P>
<P>(一) sdram sram dram</P>
<P align=justify><FONT face=宋体><FONT size=3>为什么dram要刷新，sram不需要</FONT></FONT></P>
<P align=justify><FONT size=3>这个是由于ram的设计类型决定的，dram用了一个t和一个rc电路，导致电容会漏电和缓慢放...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Fri, 26 Sep 2008 10:37:55 GMT</pubDate>
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								<title>波特率 比特率</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-52409</link>
								<description><![CDATA[<P>(转自百度)</P>
<P>波特率</P>
<DIV id=lemmaContent>
<DIV class=bpctrl></DIV>　　调制解调器的通讯速度。波特率是指线路状态更改的次数。只有每个信号符合所传输数据的一位时，才等于每秒位数。<BR>
<DIV class=spctrl></DIV>　　为了在彼此之间通讯，调制解调器...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Wed, 24 Sep 2008 11:28:46 GMT</pubDate>
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								<title>ISE ,Modelsim 相关问题总结</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-52290</link>
								<description><![CDATA[<P>最近在玩FPGA,把遇到的问题陆续总结到这里:</P>
<H5><FONT color=#ff9933>Modelsim :</FONT></H5>
<P>&nbsp;1. object 中不能显示(或者只能部分显示)信号的问题:</P>
<P>&nbsp;&nbsp;&nbsp;&nbsp; 关闭simulation选项卡中的 优化(optimization)&nbsp; 即可.</P>
<P...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Thu, 11 Sep 2008 16:19:17 GMT</pubDate>
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								<title>FPGA的配置及接口电路（转）</title>
								<link>http://www.edacn.net/?uid-44474-action-viewspace-itemid-52196</link>
								<description><![CDATA[<P>转载：</P>
<P>
<TABLE cellSpacing=0 cellPadding=0 width=500 border=0>
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<DIV align=center>磊 张焕春 胡银彪<BR>南京航空航天大学 江苏 南京 210016</DIV></TD></TR>
<TR class=l12>
<TD>
<P>0引言</P>
<P>与CPLD不...]]></description>
								<category>blog</category>
								<author>lionking_2046</author>
								<pubDate>Tue, 02 Sep 2008 16:48:35 GMT</pubDate>
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